Seiko SII Power Sequencer S-77100/77101 Series
This series is specially designed to assure a stable startup of systems using microcontrollers, FPGA ( Fiel programmable Gate Array) or SoC (System On Chip) with multiple power supply pins.
Series *Enables easy control of the power sequence only by connecting an external capacitor *Minimizes the load to a power source due to the low current consumption of 3,0µA typ. (in a stable status). *Various selectable options such as input/output form to meet your diverse needs.
Item | S-77100 | S-77101 |
Method to control on/off sequence |
One Input signal (ON pin ) |
Separate input signals (ON pin, OFF pin ) |
Number of channels | 4 channels | 3 channels |
Current consumption |
3.0µA typ. (off period / power-good period, Vdd=3.3V, Ta=+25 C ) | |
Operation Voltage Range | 2.2 to 5.5V | |
Operation temperature range | Ta = -40 to +85 C | |
Order of enable output can be selected | reverse type forward type | |
Number of Charge and discharge times for external capacitor (Cdly) can be selected |
2 times / 4 times / 8 times / 16 times | |
Input level (ON pin, OFF pin) can be selected | Schmitt trigger input, comparator input | |
Output form (ENBL_x pin ) can be selected | CMOS output, Nch open-drain output | |
Output logic (ENBL_x pin) can be selcted | Active "H" , Active "L" |
For more information please contact sales(at)elgood.fi or directy